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The MIT Lincoln Laboratory TX-2 system (1957) was the first to provide multiple levels of priority interrupts.
A level-triggered interrupt is an interrupt signaled by maintaining the interrupt line at a high or low logic level.
This makes it possible to know which hardware device caused which interrupts.The National Bureau of Standards DYSEAC (1954) was the first to use interrupts for I/O.The IBM 704 was the first to use interrupts for debugging, with a "transfer trap", which could invoke a special routine when a branch instruction was encountered.These interrupt values are often called IRQ lines, or just interrupt lines. Unlike interrupts, exceptions occur synchronously with respect to the processor clock.That is why sometimes they are referred to as synchronous interrupts.
If implemented in hardware as a distinct component, an interrupt controller circuit such as the IBM PC's Programmable Interrupt Controller (PIC) may be connected between the interrupting device and the processor's interrupt pin to multiplex several sources of interrupt onto the one or two CPU lines typically available.